The present invention relates to a liquid crystal display device of an active matrix type for displaying image data and character data received from OA equipment or the like, and to the structure of an n-channel thin-film transistor used for this device.
A thin-film transistor (hereinafter abbreviated as TFT) has heretofore been used for driving liquid crystals for each pixel in a panel of a liquid crystal display device of the direct-viewing type. A simple switching element suffices for the performance of the TFT and, hence, amorphous silicon has been used to form the semiconductor thin film. On the other hand, a liquid crystal display device of the projection type requires a high degree of brightness, and the TFT must be realized in a small size to increase the transmission factor. However, it was not allowed to decrease the size of the TFT formed by amorphous silicon, since its current driving ability was so small. Therefore, so-called high-temperature polysilicon has been developed, featuring an increased current driving ability by using quartz glass as a substrate and by polycrystallizing amorphous silicon at a temperature as high as 900xc2x0 C. or higher.
However, quartz glass is very expensive and drives up the cost of production. Therefore, so-called low-temperature polysilicon has been developed by using an inexpensive glass substrate and polycrystallizing amorphous silicon by irradiation with a laser beam.
In recent years, strikingly improved performance has been exhibited by the TFT formed by using low-temperature polysilicon. Under such circumstances, there is a tendency to utilize the TFT not only as a switching element for driving the pixels of a panel in a liquid crystal display device, but also for the peripheral drive circuits in the liquid crystal display device. Moreover, a liquid crystal display device, such as a system-in-display, is emerging, being furnished with a memory function, as well as various functions of a CPU, interface, I/O and input by pen by using TFTs. In these cases, the role played by the TFT is not limited only to that of a simple switching element; i.e., performance and reliability are required by taking the logic circuits into account.
When the TFT is used as a logic element, eight kinds of voltage patterns will be applied to the three terminals of the gate, source and drain, as tabulated below, wherein xe2x80x9cHxe2x80x9d denotes a high level and xe2x80x9cLxe2x80x9d denotes a low level.
So far, a TFT has been used for driving a liquid crystal pixel, and the above-mentioned patterns 1 to 4 have been exclusively used, i.e., relations of a potential difference across the source and the drain have been exclusively used. When a potential difference develops across the source and the drain, a high electric field is established in the TFT, and a carrier having abnormally high energy (hereinafter referred to as hot carrier) is generated. The hot carrier that is injected into the gate oxide film causes a problem of deterioration in the characteristics of a TFT.
It has heretofore been attempted to solve the problem of a hot carrier that is generated when a high electric field is applied across the source and the drain. As a means for solving this problem, there have been proposed a lightly doped drain (LDD) structure and a double drain structure, as disclosed in xe2x80x9cSubmicron Device 2xe2x80x9d, by Mitsumasa Koyanagi, Maruzen Co., 1995, p. 187. According to these structures, a high electric field applied across the source and the drain is relaxed to prevent the generation of a hot carrier. These structures involve the case when a single crystal is used as a semiconductor. The same, however, also holds true even in the case of a TFT.
However, almost no consideration has been given to the problem of deterioration caused by a voltage application pattern 6 that is tabulated above. This is because, in the conventional TFT for simply driving a liquid crystal pixel, such a voltage application pattern has seldom occurred. When a peripheral circuit is fabricated by using the TFTs, however, the voltage application pattern 6 tabulated above occurs in an analog switch used, for example, for a shift register.
In an n-channel TFT in which the source assumes the level xe2x80x9cHxe2x80x9d and the drain is assuming xe2x80x9cHxe2x80x9d, in particular, the on-current drastically decreases and the TFT characteristics are deteriorated when a stress is applied to the gate, i.e., when xe2x80x9cLxe2x80x9d and xe2x80x9cHxe2x80x9d are alternatingly input to the gate (hereinafter, this stress mode is referred to as the gate-negative pulse mode). The cause of deterioration of the TFT characteristics in the gate-negative pulse mode is as described below. When the gate voltage changes from xe2x80x9cHxe2x80x9d into xe2x80x9cLxe2x80x9d, the channel region changes from a depletion layer in which no carrier is present into an accumulated layer in which holes are present in an excess amount. In this case, holes are induced on the surface of the semiconductor thin film from the channel region of the semiconductor thin film. Here, it is considered that the holes gain high energy due to an electric field of a gate-negative pulse and turn into hot holes which are then injected into the gate oxide film, whereby an interface level is generated on the surface of the semiconductor device to greatly deteriorate the TFT characteristics.
The object of the present invention is to provide a TFT having a structure in which the characteristics are not deteriorated in the gate-negative pulse mode.
Moreover, an object of the present invention is to provide a liquid crystal display device which features a simplified circuitry and an improved display quality by employing a TFT which is less deteriorated in the gate-negative pulse mode, for a liquid crystal display device, the circuitry of which is becoming complex or the display quality of which is becoming poor, due to a limitation on the range, when utilizing the TFT which is deteriorated in the gate-negative pulse mode.
Furthermore, it is an object of the present invention to provide a liquid crystal display device equipped with a shift register having improved reliability by employing in the shift register a TFT which is less deteriorated in the gate-negative pulse mode.
Moreover, it is an object of the present invention to provide a liquid crystal display device using an analog switch having improved reliability by utilizing in the analog switch a TFT which is less deteriorated in the gate-negative pulse mode.
According to the present invention, the above-mentioned objects are accomplished by providing the semiconductor thin film of a TFT with a p-type semiconductor region that is in contact with a channel region, but is electrically connected to nowhere except the channel region. Upon employing this structure, holes induced on the surface by the gate-negative pulses are further supplied from the p-type semiconductor region. The holes supplied from the p-type semiconductor region relax the electric field established by the gate-negative pulse. Therefore, less hot holes are injected into the gate oxide film, and the TFT characteristics are less deteriorated. Besides, the p-type semiconductor region needs to be connected to nowhere except the channel region and can, hence, be replaced by a conventional TFT, and an increase in the TFT area is confined to the p-type semiconductor region only.
According to the present invention, furthermore, the above-mentioned objects are accomplished by using the above-mentioned TFTs as n-channel insulated gate thin-film transistors in the liquid crystal display device, by using the above-mentioned TFTs as n-channel insulated gate thin-film transistors to constitute shift registers in the peripheral circuit, and by using the above-mentioned TFTs as n-channel insulated gate thin-film transistors to constitute analog switches in the peripheral circuit.
That is, the present invention is concerned with an n-channel insulated gate thin-film transistor using electrons as a main current carrier and comprising a semiconductor thin film formed on an insulating substrate and a gate electrode formed on said semiconductor thin film via a gate insulating film, said semiconductor thin film having a source region and a drain region which are n-type semiconductor regions formed therein sandwiching a channel region which is an intrinsic semiconductor region just under the gate electrode, wherein said semiconductor thin film has a p-type semiconductor region in contact with the channel region, and said p-type semiconductor region is electrically connected to nowhere except the channel region.
The present invention is further concerned with an n-channel insulated gate thin-film transistor using electrons as a main current carrier and comprising a gate electrode formed on an insulating substrate and a semiconductor thin film formed on said gate electrode via a gate insulating film, said semiconductor thin film having a source region and a drain region which are n-type semiconductor regions formed therein sandwiching a channel region which is an intrinsic semiconductor region just over the gate electrode, wherein said semiconductor thin film has a p-type semiconductor region in contact with said channel region, and said p-type semiconductor region is electrically connected to nowhere except the channel region.
Moreover, the present invention is concerned with an n-channel insulated gate thin-film transistor using electrons as a main current carrier and comprising an insulating film formed on a semiconductor substrate, a semiconductor thin film formed on said insulating layer and a gate electrode formed on said semiconductor thin film via a gate insulating film, said semiconductor thin film having a source region and a drain region which are n-type semiconductor regions formed therein sandwiching a channel region which is an intrinsic semiconductor region just under the gate electrode, wherein said semiconductor thin film has a p-type semiconductor region in contact with the channel region, and said p-type semiconductor region is electrically connected to nowhere except the channel region.
The present invention is further concerned with a liquid crystal display device comprising:
an active matrix including a plurality of scanning electrodes formed on an insulating substrate, a plurality of video signal electrodes formed so as to intersect the scanning electrodes, thin-film transistors connected to the scanning electrodes and to the video signal electrodes, and pixel electrodes connected to said thin-film transistors;
a peripheral circuit formed on said insulating substrate by the same method as that of forming said thin-film transistors;
an opposing substrate opposed to said insulating substrate; and
liquid crystals held between said insulating substrate and said opposing substrate;
wherein said n-channel insulated gate thin-film transistors are used as said thin-film transistors.
In the liquid crystal display device, the TFT characteristics are little deteriorated when the above-mentioned n-channel insulated gate thin-film transistors are used for the shift registers in the peripheral circuit and, particularly, when the above-mentioned n-channel insulated gate thin-film transistors are used to play the role of analog switches in the shift registers in the peripheral circuit.